1. Field of the Invention
This invention relates to digital peripheral equipment controllers and more specifically to an input process sequence controller for relieving the central processor with which the peripheral equipment communicates, of certain processing functions.
2. Description of the Prior Art
Most present date peripheral controllers are designed to control I/O data transfers. No data manipulation is performed on the data stream as it is transferred between the central processor and the peripheral digital device. The preferred embodiment of this invention involves seismic data processing prior to transmission to a central processor. The present invention is a major component of an intelligent controller which is the subject of U.S. patent application Ser. No. 095,807, filed Nov. 19, 1979. In prior art seismic data processors, data moving between the central processor and, for example, its tape sub-system, are transferred in a memory image form, in the same format as they were recorded in the field. Unfortunately, field recorded data is not optimized for manipulation by the typical office processing system. In the present state of the art, it is estimated that there are approximately 200 seismic field formats and with the present date peripheral controllers, the central processor is required to transform any of those field formats to a blocked demultiplexed format of a relatively short record and with numerical representations that are either 16 to 32-bit six point integers, or 32 to 40-bit floating point values.
A state of the art solution has been to increase the power of the central processor and the speed and size of its central memory. However, this solution tends to be expensive, requiring an extensive hardware and software effort. Also, in view of the fact that seismic data collection is increasing at an exponential rate, this solution is not long term.
This invention provides a viable alternative, reducing the burden placed on the central processor by shifting some of the processing burdens onto intelligent peripheral controllers. This relieves the central processor of the need to execute common tasks, such as scan detection, scan lengths, error correction, true amplitude recovery, format conversions, data scaling/limiting, and channel demultiplexing.